Yaesu FT-710 AESS

SDR circuit configuration emphasizes Receiving Performance
The FT-710 is equipped with the same high resolution A/D converter and FPGA used in Yaesu high end SDR transceivers. The twin A/D converter circuit configuration performs digital conversion processing using two A/D converters. The digital signal is combined by the FPGA to reduce overload and overflow of the A/D converters and improve blocking characteristics. In addition, random noise is added to the analog signal before digital conversion, distortion is suppressed by minimizing the quantization error during digital conversion by the A/D converter and a dithering technology that improves IM (Intermodulation) characteristics is adopted. The overall performance of the SDR receiving circuit is superb.

AESS produces high fidelity audio
AESS (Acoustic Enhancement Speaker System) is generated by digital processing. The Mid-Low frequency enhancement speaker and the side speaker are combined to create the dramatic overall audio frequency response and high fidelity audio output.

Quick Memory Bank (QMB) function
The QMB function can be used to store dedicated memory channels (Quick Memory Bank). With one touch a memory can easily be recalled. The Quick Memory Bank stores the freq uency, the mode, and also the transmit/receive settings, filter and other parameters, so operating may begin quickly in the best condition without resetting, when switching bands. Memory settings can be easily checked by listing the memory contents on the display. (up to 10 memory channels are available).

Front panel design emphasizes operating efficiency and comfort.
Compact transceiver, with a large 4.3 inch full color TFT with touch panel display provides intuitive operation and outstanding visibility. Primary operating functions are arranged on the front and centered above the VFO dial for operating efficiency and instant access.

Frequency range:TX: 1.8-54 / 70-70.5 MHz, RX: 30 kHz-75 MHz / 50-53.99 / 70-70.49 MHz